Micron Technology jobs
Subscribe to RSS Feed| Posted | Job Title | Company | Location |
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| Jan 03 | NAND Device Engineer | Intel | Santa Clara, CA |
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part of the Joint Development Program with Micron Technologies. In this position, you ... travel to Boise working with Intel and Micron Technologies counterparts to develop... more |
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| Jan 03 | NAND Device Engineer | Intel | Boise, ID |
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part of the Joint Development Program with Micron Technologies. In this position, you ... travel to Boise working with Intel and Micron Technologies counterparts to develop... more |
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| Jan 03 | Software Engineer | Intel | Hillsboro, OR |
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investigation of trade-offs when analyzing technology and design options. The ... and thermal management at the sub-micron scale. He/She will bring in-house... more |
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| Jan 02 | CAD/Design Flow Automation Engineer | Rambus | North Carolina |
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should have exposure to current sub-micron CMOS process technology (e.g. 45nm), ASIC design flow and design methodology challenges. Requirements: B.S. or M.S. in Electrical... more |
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| Jan 02 | SENIOR VLSI ENGINEER | NVIDIA | Santa Clara, CA |
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design implementation on 65nm or below technology. - Successful track record of ... and tapeout issues. - Knowledge of deep sub-micron issues as they relate to routing,... more |
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| Dec 31 | DRAM Product Test Engineer | Micron Technology | Manassas, VA |
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a DRAM Product Test Engineer at Micron Technology, Inc. in Manassas, VA , you will develop, debug, and maintain test coverage. In this position you will be expected to understand... more |
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| Dec 30 | Research Scientist I/O Circuit | Intel | Hillsboro, OR |
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and/or mixed-signal circuits and deep sub-micron Complementary Metal-Oxide ... Technology group is to drive Intel's technology leadership. This includes... more |
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| Dec 29 | New Product Introduction Planner | Micron Technology | Boise, ID |
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an example of implementing this strategy. Micron is seeking an NPI Planner in the ... of NAND flash based products and technology (a plus). * The ability to be... more |
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| Dec 29 | SENIOR VLSI ENGINEER | NVIDIA | Santa Clara, CA |
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design implementation on 65nm or below technology. - Successful track record of ... and tapeout issues. - Knowledge of deep sub-micron issues as they relate to routing,... more |
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| Dec 29 | SENIOR VLSI ENGINEER | NVIDIA | Santa Clara, CA |
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design implementation on 65nm or below technology. - Successful track record of ... and tapeout issues. - Knowledge of deep sub-micron issues as they relate to routing,... more |
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